forked from DGNum/liminix
110 lines
3.1 KiB
Nix
110 lines
3.1 KiB
Nix
# GL.INet GL-MT300A
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{
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system = {
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crossSystem = {
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config = "mipsel-unknown-linux-musl";
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gcc = {
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abi = "32";
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arch = "mips32"; # maybe mips_24kc-
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};
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};
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};
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module = { pkgs, ...}:
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let
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openwrt = pkgs.fetchFromGitHub {
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name = "openwrt-source";
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repo = "openwrt";
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owner = "openwrt";
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rev = "a5265497a4f6da158e95d6a450cb2cb6dc085cab";
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hash = "sha256-YYi4gkpLjbOK7bM2MGQjAyEBuXJ9JNXoz/JEmYf8xE8=";
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};
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in {
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device = {
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defaultOutput = "tftproot";
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loadAddress = "0x80000000";
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entryPoint = "0x80000000";
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radios = ["rt2800soc"];
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};
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boot.tftp = {
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loadAddress = "0x00A00000";
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};
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boot.dts = {
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src = "${openwrt}/target/linux/ramips/dts/mt7620a_glinet_gl-mt300a.dts";
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includes = [
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"${openwrt}/target/linux/ramips/dts"
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];
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};
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kernel = {
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src = pkgs.fetchurl {
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name = "linux.tar.gz";
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url = "https://cdn.kernel.org/pub/linux/kernel/v5.x/linux-5.15.71.tar.gz";
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hash = "sha256-yhO2cXIeIgUxkSZf/4aAsF11uxyh+UUZu6D1h92vCD8=";
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};
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extraPatchPhase = ''
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cp -av ${openwrt}/target/linux/generic/files/* .
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chmod -R u+w .
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cp -av ${openwrt}/target/linux/ramips/files/* .
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chmod -R u+w .
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patches() {
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for i in $* ; do patch --batch --forward -p1 < $i ;done
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}
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patches ${openwrt}/target/linux/generic/backport-5.15/*.patch
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patches ${openwrt}/target/linux/generic/pending-5.15/*.patch
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patches ${openwrt}/target/linux/generic/hack-5.15/*.patch
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patches ${openwrt}/target/linux/ramips/patches-5.15/*.patch
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'';
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config = {
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MIPS_ELF_APPENDED_DTB = "y";
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OF = "y";
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USE_OF = "y";
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RALINK = "y";
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PCI = "y";
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SOC_MT7620 = "y";
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SERIAL_8250_CONSOLE = "y";
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SERIAL_8250 = "y";
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SERIAL_CORE_CONSOLE = "y";
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SERIAL_OF_PLATFORM = "y";
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CONSOLE_LOGLEVEL_DEFAULT = "8";
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CONSOLE_LOGLEVEL_QUIET = "4";
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# "empty" initramfs source should create an initial
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# filesystem that has a /dev/console node and not much
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# else. Note that pid 1 is started *before* the root
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# filesystem is mounted and it expects /dev/console to
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# be present already
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BLK_DEV_INITRD = "n";
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NET = "y";
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NETDEVICES = "y";
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ETHERNET = "y";
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NET_RALINK_MDIO = "y";
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NET_RALINK_MDIO_MT7620 = "y";
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NET_RALINK_MT7620 = "y";
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SWCONFIG = "y";
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SWPHY = "y";
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NET_VENDOR_RALINK = "y";
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MTD = "y";
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MTD_CMDLINE_PARTS = "y";
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MTD_BLOCK = "y"; # fix undefined ref to register_mtd_blktrans_devs
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CPU_LITTLE_ENDIAN = "y";
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CMDLINE_PARTITION = "y";
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EARLY_PRINTK = "y";
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PARTITION_ADVANCED = "y";
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PRINTK_TIME = "y";
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SQUASHFS = "y";
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SQUASHFS_XZ = "y";
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};
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};
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};
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}
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